高级首席工程师 - 服务器固件与系统架构

Sr. Principal – Server Firmware & System Architecture

Astera Labs

地点: 研究三角园区，美国
类型: 全职
资历: senior

半导体 HPC 计算机与数据中心服务器与数据中心硬件

中文 English

职责

定义 AI 平台端到端架构，从节点级设计到机架级可组合系统。
推动基于 PCIe 的架构，实现计算、内存和加速器的解耦式可扩展性。
为 GPU/加速器密集型系统构建架构解决方案，优化 AI 训练和推理工作负载。
主导连接解决方案（重定时器、交换机、交换矩阵控制器）集成，与 Astera Labs 产品生态对齐。
推动服务器 BIOS/UEFI 架构、OpenBMC 平台管理、Redfish API 及生命周期配置框架创新。
主导系统启动，确保复杂 AI 平台固件、硬件和软件无缝集成。
制定 AI 基础设施平台技术愿景和多年固件路线图。
制定端到端 AI 平台性能策略，包括 PCIe 拓扑优化、带宽扩展、延迟降低及 CPU 性能调优。
优化 DDR、NUMA 和新兴内存扩展技术的内存性能。
主导多加速器系统（GPU/ASIC/FPGA）、高吞吐量数据管道和分布式 AI 工作负载性能调优。
与芯片供应商、连接生态伙伴、OEM、ODM 和超大规模数据中心运营商合作。
影响 OpenBMC、Redfish、OCP 及相关联盟行业标准。
指导资深工程师，培养技术人才储备。
代表 Astera Labs 展现 AI 基础设施和平台创新领域思想领袖地位。

必备要求

计算机科学、电气工程、计算机工程或相关领域学士学位。
15 年以上系统架构、服务器固件或平台工程经验。
精通服务器 BIOS/UEFI、OpenBMC 和 BMC 固件栈以及 Redfish 或数据中心管理框架。
精通 PCIe 架构和性能优化（Gen4/5/6）。
具备高性能计算或 AI 平台 CPU、内存和系统级性能调优经验。
精通 C/C++ 和底层系统软件编程。
在领导跨职能、大规模架构项目方面有卓越成功经验。

优先条件

计算机科学、电气工程或相关领域硕士或博士学位。
具备机架级可组合基础设施和解耦架构经验。
具备 AI 训练集群、基于加速器的系统或超大规模数据中心设计背景。
在高速互连解决方案（重定时器、交换机、互连集成电路）方面有专业知识。
具备平台生命周期管理系统和车队级自动化经验。
对行业标准组织或开源固件生态系统有贡献。
具备制定多年技术路线图和影响高管战略的能力。

Responsibilities

Define end-to-end architecture for AI platforms, from node-level design to rack-level composable systems.
Drive PCIe-based architectures for disaggregated scalability of compute, memory, and accelerators.
Build architectural solutions for GPU/accelerator-intensive systems to optimize AI training and inference workloads.
Lead integration of connectivity solutions (retimers, switches, fabric controllers) aligned with Astera Labs' product ecosystem.
Drive innovation in server BIOS/UEFI architecture, OpenBMC-based platform management, Redfish APIs, and lifecycle provisioning frameworks.
Lead system bring-up and ensure seamless integration of firmware, hardware, and software across complex AI platforms.
Define technical vision and multi-year firmware roadmap for AI infrastructure platforms.
Own end-to-end AI platform performance strategy, including PCIe topology optimization, bandwidth scaling, latency reduction, and CPU performance tuning for AI orchestration workloads.
Optimize memory performance for DDR, NUMA, and emerging memory expansion technologies.
Lead performance tuning for multi-accelerator systems (GPU/ASIC/FPGA), high-throughput data pipelines, and distributed AI workloads.
Collaborate with silicon vendors (CPU, GPU, AI accelerators), connectivity ecosystem partners, OEMs, ODMs, and hyperscalers.
Influence industry standards in OpenBMC, Redfish, OCP, and related consortia.
Mentor senior engineers and foster a strong technical talent pipeline.
Represent Astera Labs as a recognized thought leader in AI infrastructure and platform innovation.

Must Have

Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or related field.
15+ years of experience in system architecture, server firmware, or platform engineering.
Expertise in server BIOS/UEFI, OpenBMC and BMC firmware stacks, and Redfish or data center management frameworks.
Expertise in PCIe architecture and performance optimization (Gen4/5/6).
Experience in CPU, memory, and system-level performance tuning for high-performance computing or AI platforms.
Proficiency in C/C++ and low-level systems software programming.
Proven success leading cross-functional, large-scale architecture projects.

Preferred

Master's or PhD in Computer Science, Electrical Engineering, or related field.
Experience with rack-level composable infrastructure and disaggregated architectures.
Background in AI training clusters, accelerator-based systems, or hyperscale data center design.
Expertise in high-speed interconnect solutions such as retimers, switches, and interconnect ICs.
Experience with platform lifecycle management systems and fleet-level automation.
Contributions to industry standards bodies or open-source firmware ecosystems.
Ability to define multi-year technical roadmaps and influence executive strategy.

公司简介

Astera Labs（纳斯达克股票代码：ALAB）通过定制的连接解决方案提供机架级人工智能基础设施。通过与超大规模数据中心和生态系统合作伙伴的协作，Astera Labs 助力企业充分释放现代人工智能的潜力。Astera Labs 的智能连接平台集成了 CXL、以太网、NVLink、PCIe 和 UALink™ 等基于半导体的技术，并结合公司自有的 COSMOS 软件套件，将各种组件整合为统一、灵活的系统，从而实现端到端的纵向扩展和横向扩展连接。公司定制的连接解决方案业务是其基于标准的产品组合的补充，使客户能够部署定制架构，以满足其独特的基础设施需求。了解更多信息，请访问 www.asteralabs.com。